Asymmetric semiconductor device having dual work function gate and method of fabrication
US6630720B1 · kind B1 · utility
51Cited by
28References
21Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 26, 2001 |
| Grant date | Oct 7, 2003 |
| Priority date | — |
| Expiry date | Jan 25, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An asymmetric semiconductor device and a method of making a pair of the asymmetric devices. The semiconductor device includes a layer of semiconductor material having a source and a drain, and a dual work function gate disposed on the layer of semiconductor material to define a channel interposed between the source and the drain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.