Methods used in fabricating gates in integrated circuit device structures
US6638874B2 · kind B2 · utility
4Cited by
4References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2002 |
| Grant date | Oct 28, 2003 |
| Priority date | — |
| Expiry date | Jul 17, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32136
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention is a method used to fabricate a device on a substrate, which method is utilized at a stage of processing wherein a metal gate stack is disposed or formed over a gate oxide, which metal stack includes a refractory metal layer disposed or formed over a refractory metal barrier/adhesion layer, which method includes steps of: (a) etching the refractory metal layer and stopping on or in the refractory metal barrier/adhesion layer; and (b) etching the refractory metal barrier/adhesion layer using a passivation etching chemistry without oxygen.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.