Memory manufacturing process using bitline rapid thermal anneal

US6653191B1 · kind B1 · utility

Assignees

• Advanced Micro Devices, Inc. · US
• FUJITSU LIMITED · JP

Inventors

• Jean Y. Yang · Sunnyvale, US
• Arvind Halliyal · Cupertino, US
• Amir H. Jafarpour · Pleasanton, US
• Tazrien Kamal · Atlanta, US
• Mark T. Ramsbey · Sunnyvale, US
• Emmanuil Lingunis · San Jose, US
• Hidehiko Shiraiwa · San Jose, US

Key dates

• Filing date: May 16, 2002
• Grant date: Nov 25, 2003
• Expiry date: May 16, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B69/00

Abstract

A method of manufacturing an integrated circuit includes providing a semiconductor substrate and depositing a charge-trapping dielectric layer and a gate dielectric layer over the semiconductor substrate. Bitlines are implanted closely in the semiconductor substrate and annealed using a rapid thermal anneal. Wordlines and gates are formed and source/drain junctions are implanted in the semiconductor substrate. An interlayer dielectric layer is deposited and the integrated circuit completed.