Vertical bipolar transistor having little low-frequency noise and high current gain, and corresponding fabrication process
US6656812B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2000 |
| Grant date | Dec 2, 2003 |
| Priority date | — |
| Expiry date | Nov 21, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/165
Abstract
A vertical bipolar transistor includes a semiconductor substrate, an extrinsic collector layer in the semiconductor substrate, an intrinsic collector on the extrinsic collector, a lateral isolating region surrounding an upper part of the intrinsic collector, an offset extrinsic collector well, a base including a semiconductor region above the intrinsic collector and above the lateral isolating region including at least one silicon layer, and a doped emitter surrounded by the base. The doped emitter may include first and second parts. The first part may be formed from single-crystal silicon and in direct contact with the upper surface of the semiconductor region in a predetermined window in the upper surface above the intrinsic collector. The second part may be formed from polycrystalline silicon. The two parts of the emitter may be separated by a separating oxide layer spaced apart from the emitter-base junction of the transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.