Method to fabricate a single gate with dual work-functions
US6664153B2 · kind B2 · utility
7Cited by
15References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 8, 2002 |
| Grant date | Dec 16, 2003 |
| Priority date | — |
| Expiry date | May 2, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28035
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a single gate having a dual work-function is described. A gate electrode is formed overlying a gate dielectric layer on a substrate. Sidewalls of the gate electrode are selectively doped whereby the doped sidewalls have a first work-function and whereby a central portion of the gate electrode not doped has a second work-function to complete formation of a single gate having multiple work-functions in the fabrication of integrated circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.