Ferroelectric memory configuration and a method for producing the configuration

US6664158B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Christine Dehm · Koblenzer Straße, DE
• Heinz Honigschmid · Starnberg, DE
• Thomas Rohr · Aschheim, DE

Key dates

• Filing date: Nov 21, 2001
• Grant date: Dec 16, 2003
• Expiry date: Nov 21, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B53/30

Abstract

An integrated ferroelectric memory configuration and a method for producing the integrated ferroelectric memory configuration, in which memory cells are arranged using the stacking principle, and both capacitor electrodes, which are located one above the other, of each memory cell are directly electrically connected by means of contact plugs to corresponding source and drain regions of an associated selection transistor in the substrate. Contact plugs for the contact connection to the upper capacitor electrodes are produced from above the configuration.