Semiconductor component having double passivating layers formed of two passivating layers of different dielectric materials
US6664612B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2001 |
| Grant date | Dec 16, 2003 |
| Priority date | — |
| Expiry date | Jan 9, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/3192
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor component with passivation includes at least two double passivating layers, of which an uppermost is applied to a planar surface of a layer located therebelow. The double passivating layers include two layers of different dielectric materials, for example silicon oxide and silicon nitride. The respective thicknesses of the individual passivating layers can be adapted to dimensions of the structuring of the layer to which the passivation is applied. This produces a reliable passivation which is particularly suitable for capacitively measuring fingerprint sensors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.