Transistor with local insulator structure
US6670260B1 · kind B1 · utility
122Cited by
9References
20Claims
0Family size
Assignee
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Key dates
| Filing date | May 24, 2000 |
| Grant date | Dec 30, 2003 |
| Priority date | — |
| Expiry date | May 24, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/115
Abstract
A thin filmed fully-depleted silicon-on-insulator (SOI) metal oxide semiconductor field defect transistor (MOSFET) utilizes a local insulation structure. The local insulative structure includes a buried silicon dioxide region under the channel region. The MOSFET body thickness is very small and yet silicon available outside of the channel region and buried silicon dioxide region is available for sufficient depths of silicide in the source and drain regions. The buried silicon dioxide region can be formed by a trench isolation technique or a LOCOS technique.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.