Patent · US Expired

Semiconductor device having increased metal silicide portions and method of forming the semiconductor

US6673665B2 · kind B2 · utility

5Cited by

8References

24Claims

0Family size

Assignee

Advanced Micro Devices, Inc. · US

Inventors

Karsten Wieczorek · Dresden, DE
Manfred Horstmann · Dresden, DE
Rolf Stephan · Dresden, DE

Key dates

Filing date	Jul 31, 2002
Grant date	Jan 6, 2004
Priority date	—
Expiry date	Jul 31, 2022

Classification

Technology area (CPC H)Electricity
CPC primaryH10D84/038
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

The surface area of silicon lines which receives a silicide portion is increased to decrease the line resistance in narrow polysilicon lines, such as gate electrodes. Sidewall spacers are formed such that an upper portion of the line sidewall is exposed so as to react with a refractory metal to form a low resistance silicide. The upper portion may be exposed by overetching the dielectric layer deposited to form the sidewall spacers.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.