Method of producing a capacitor electrode with a barrier structure
US6686265B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 22, 2002 |
| Grant date | Feb 3, 2004 |
| Priority date | — |
| Expiry date | Apr 22, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/696
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A capacitor electrode is produced with an underlying barrier structure. A barrier incorporation layer is used and a CMP (chemical mechanical polishing) process is employed in order to produce the barrier structure. The capacitor electrode with an underlying barrier structure is produced by depositing a barrier layer on a semiconductor substrate; forming a barrier structure from the barrier layer with a lithographic mask and an etching step; depositing a barrier incorporation layer covering the barrier structure and surrounding regions; and removing the barrier incorporation layer with chemical mechanical polishing until the barrier structure is uncovered, to thereby form the capacitor electrode above the barrier structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.