Gate structure with independently tailored vertical doping profile
US6686637B1 · kind B1 · utility
13Cited by
15References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2002 |
| Grant date | Feb 3, 2004 |
| Priority date | — |
| Expiry date | Nov 21, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/371
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A gate structure for a semiconductor transistor is disclosed. In an exemplary embodiment, the gate structure includes a lower polysilicon region doped at a first dopant concentration and an upper polysilicon region doped at a second concentration, with the second concentration being different than the first concentration. A conductive barrier layer is disposed between the lower and the upper polysilicon regions, wherein the conductive barrier layer prevents diffusion of impurities between the lower and the upper polysilicon regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.