Flexible redundancy for memories
US6687171B2 · kind B2 · utility
3Cited by
3References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 26, 2002 |
| Grant date | Feb 3, 2004 |
| Priority date | — |
| Expiry date | Apr 26, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An improved redundancy scheme for a memory matrix is disclosed. The memory matrix a plurality of memory cells interconnected in first and second directions. The memory cells are grouped into memory elements. A redundant memory element having a plurality of redundant memory cells is provided. The redundant memory element is segmented into R sections in the first direction, wherein R is a whole number greater to or equal to 2. By segmenting the redundant element into R sections, it can be used to repair defects in up to R different memory elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.