Technique for etching a low capacitance dielectric layer

US6696366B1 · kind B1 · utility

Assignee

• Lam Research Corporation · US

Inventors

• Ian J. Morey · Singapore, SG
• Susan Ellingboe · Fremont, US
• Janet M. Flanner · Union City, US
• Christine Janowiak · Fremont, US
• John Lang · Milpitas, US

Key dates

• Filing date: Jun 30, 1999
• Grant date: Feb 24, 2004
• Expiry date: Jun 30, 2019

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/31144
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Techniques for etching through a low capacitance dielectric layer in a plasma processing chamber are disclosed. The techniques uses an etch chemistry that includes N2, O2, and a hydrocarbon. By etching the low capacitance dielectric layer with a plasma created out of the etch chemistry, fast etch rates can be obtained while also maintaining profile control and preserving critical dimension of the resultant opening (e.g., via/trench) being etched in the low capacitance layer.