Method and apparatus for determining actual write latency and accurately aligning the start of data capture with the arrival of data at a memory device
US6697926B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2001 |
| Grant date | Feb 24, 2004 |
| Priority date | — |
| Expiry date | Mar 27, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for accurately determining the actual arrival of data at a memory device relative to the write clock to accurately align the start of data capture and the arrival of the data at the memory device is disclosed. The actual time of arrival of data at the inputs to a memory device is determined by sending back-to-back write commands along with a predetermined data pattern to the memory device. The data pattern is stored in a register and any difference between the predicted arrival time of the data and the actual arrival time of the data is determined by logic circuitry. Any determined difference can then be compensated for by delaying the start of the capture of the data at the memory device, thereby accurately aligning the start of the data capture and the arrival of the data at the memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.