Method for producing an electronic component having a plurality of chips that are stacked one above the other and contact-connected to one another

US6714418B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Gerd Frankowsky · Wappingers Falls, US
• Harry Hedler · Germering, DE
• Roland Irsigler · Munich, DE
• Thorsten Meyer · Regensburg, DE
• Barbara Vasquez · Austin, US

Key dates

• Filing date: Nov 1, 2002
• Grant date: Mar 30, 2004
• Expiry date: Nov 1, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/15331
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An electronic component has a plurality of chips which are stacked one above the other and contact-connected to one another. To form this component, a first planar chip arrangement is provided with the functional chips spaced apart from one another in a grid and with a filling material in the spaces between the chips to form an insulating holding frame that fixes the chips, the frame has chip-dedicated contact-connecting elements that serve for the electrical contact-connection to another chip of another chip arrangement and each chip has dedicated electrically conductive strips. At least one additional planar chip arrangement is formed by the same method as the first planar chip arrangement and is then stacked on the first planar chip arrangement so that the two chip arrangements lie one above the other and the respective contact-connecting elements of the two chip arrangements are connected to one another for electrical chip-to-chip contact-connection. Subsequently, each of the components, which comprise a stack of chips, is separated from the assembled stack of chip arrangements.