Patent · US Expired

Interface void monitoring in a damascene process

US6716650B2 · kind B2 · utility

0Cited by
22References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 11, 2002
Grant dateApr 6, 2004
Priority date
Expiry dateApr 17, 2022

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/76877
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

For determining the quality of interconnections in integrated circuits, especially in damascene applications, a method of monitoring voids is disclosed, wherein a barrier metal layer is directly deposited on a planarized metal to provide a large-area surface that is not required to be destroyed for further analysis of the interface between the metal and the barrier metal layer. The analysis may be carried out by employing an electron microscope operated in a back-scatter mode.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.