Eckhard Langer
10Patents
3h-index
11Co-inventors
53Inventor score
Filing activity: Apr 11, 2002 → Oct 13, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8329577B2 | Method of forming an alloy in an interconnect structure to increase electromigration resistance | Electricity | 6 | Active |
| US7611991B2 | Technique for increasing adhesion of metallization layers by providing dummy vias | Electricity | 5 | Active |
| US7335880B2 | Technique for CD measurement on the basis of area fraction determination | Electricity | 4 | Active |
| US6953755B2 | Technique for monitoring the state of metal lines in microstructures | Physics | 3 | Expired |
| US7311008B2 | Semiconductor structure comprising a stress sensitive element and method of measuring a stress in a semiconductor structure | Electricity | 3 | Expired |
| US8118932B2 | Technique for monitoring dynamic processes in metal lines of microstructures | Emerging Cross-Sectional Technologies | 1 | Active |
| US8058731B2 | Technique for forming metal lines in a semiconductor by adapting the temperature dependence of the line resistance | Emerging Cross-Sectional Technologies | 0 | Active |
| US8575029B2 | Technique for forming metal lines in a semiconductor by adapting the temperature dependence of the line resistance | Emerging Cross-Sectional Technologies | 0 | Active |
| US6716650B2 | Interface void monitoring in a damascene process | Electricity | 0 | Expired |
| US8058081B2 | Method of testing an integrity of a material layer in a semiconductor structure | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.