Vertical bipolar transistor including an extrinsic base with reduced roughness, and fabrication process

US6723610B2 · kind B2 · utility

Assignees

• STMicroelectronics SA
• COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventors

• Michel Marty · Buc, FR
• Alain Chantre · Seyssinet-Pariset, FR
• Jorge Regolini · Bernin, FR

Key dates

• Filing date: Aug 15, 2001
• Grant date: Apr 20, 2004
• Expiry date: Nov 22, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/177

Abstract

The vertical bipolar transistor includes an SiGe heterojunction base formed by a stack of layers of silicon and silicon-germanium resting on an initial layer of silicon nitride extending over a side insulation region surrounding the upper part of the intrinsic collector. The stack of layers also extends on the surface of the intrinsic collector which lies inside a window formed in the initial layer of silicon nitride.