Method of patterning ferroelectric layers
US6730562B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2003 |
| Grant date | May 4, 2004 |
| Priority date | — |
| Expiry date | Feb 11, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31122
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for structuring ferroelectric layers on semiconductor substrates retains or regenerates the adherence and breakdown voltage resistance of the ferroelectric layer, which is especially significant for producing storage capacitors in large-scale integrated FeRAM and DRAM memory components. The addition of H2O or O2 results principally in the recovery of the electrostatic breakdown strength of the ferroelectric layer, which is of importance in particular when the ferroelectric serves as a dielectric of a storage capacitor and has to withstand electric fields of 5-10×106 V/m without a significant leakage current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.