Semiconductor device having a buried layer for reducing latchup and a method of manufacture therefor
US6737311B2 · kind B2 · utility
1Cited by
5References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2001 |
| Grant date | May 18, 2004 |
| Priority date | — |
| Expiry date | Sep 26, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the semiconductor device. The semiconductor device may include a well doped with a P-type dopant located over a semiconductor substrate. The semiconductor device may further include a buried layer including the P-type dopant located between the well and the semiconductor substrate, and a gate located over the well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.