Dynamic process state adjustment of a processing tool to reduce non-uniformity
US6751518B1 · kind B1 · utility
47Cited by
7References
34Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 29, 2002 |
| Grant date | Jun 15, 2004 |
| Priority date | — |
| Expiry date | Sep 20, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67276
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and an apparatus for reducing process non-uniformity across a processed semiconductor wafers. A first semiconductor wafer is processed. A process non-uniformity associated with the first processed semiconductor wafer is identified. A feedback correction in response to the process non-uniformity during processing of a second semiconductor wafer is performed and/or a feed-forward compensation is performed in response to the process non-uniformity during a subsequent process performed across the first semiconductor wafer is performed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.