Trench side wall charge trapping dielectric flash memory device
US6754105B1 · kind B1 · utility
36Cited by
5References
32Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | May 6, 2003 |
| Grant date | Jun 22, 2004 |
| Priority date | — |
| Expiry date | May 6, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/691
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device that includes a charge trapping region disposed laterally adjacent a first end of a channel such that energetic electrons traversing the channel can be ballistically injected into the charge trapping region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.