Programmable interface for a configurable system bus
US6754760B1 · kind B1 · utility
13Cited by
20References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 21, 2000 |
| Grant date | Jun 22, 2004 |
| Priority date | — |
| Expiry date | Aug 31, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4018
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Interface logic is disclosed. The interface logic comprises a first address decoder, a first set of mode logic coupled to the address decoder and a first selector coupled to the first set of mode logic. The interface logic is adaptable to connect the programmable logic to the system interconnect via one of a plurality of access modes supported by the system interconnect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.