Bart Reynolds
18Patents
5h-index
33Co-inventors
66Inventor score
Filing activity: Dec 20, 1989 → Aug 31, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6467009B1 | Configurable processor system unit | Physics | 213 | Expired |
| US5448493A | Structure and method for manually controlling automatic configuration in an integrated circuit logic block array | Physics | 47 | Expired |
| US6704850B1 | Method and apparatus for determining the width of a memory subsystem | Physics | 13 | Expired |
| US6754760B1 | Programmable interface for a configurable system bus | Physics | 13 | Expired |
| US7584448B1 | Constructing a model of a programmable logic device | Physics | 7 | Active |
| US7451425B1 | Determining controlling pins for a tile module of a programmable logic device | Physics | 5 | Active |
| US7451420B1 | Determining reachable pins of a network of a programmable logic device | Physics | 4 | Active |
| US7451423B1 | Determining indices of configuration memory cell modules of a programmable logic device | Electricity | 4 | Active |
| US7536668B1 | Determining networks of a tile module of a programmable logic device | Physics | 3 | Active |
| US7472370B1 | Comparing graphical and netlist connections of a programmable logic device | Physics | 3 | Active |
| US6658547B1 | Method and apparatus for specifying address offsets and alignment in logic design | Physics | 3 | Expired |
| US6661812B1 | Bidirectional bus for use as an interconnect routing resource | Electricity | 2 | Expired |
| US10331837B1 | Device graphics rendering for electronic designs | Physics | 1 | Active |
| US7451424B1 | Determining programmable connections through a switchbox of a programmable logic device | Physics | 1 | Active |
| US11176296B1 | Unified data model for heterogeneous integrated circuit | Physics | 1 | Active |
| US10402521B1 | Programmable integrated circuits for emulation | Physics | 1 | Active |
| US6910002B1 | Method and apparatus for specifying addressability and bus connections in a logic design | Physics | 0 | Expired |
| US10956638B1 | Programmable integrated circuits for emulation | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.