Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
US6756679B2 · kind B2 · utility
3Cited by
38References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 4, 2002 |
| Grant date | Jun 29, 2004 |
| Priority date | — |
| Expiry date | Sep 4, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
After formation of Cu interconnections 46a to 46e each to be embedded in an interconnection groove 40 of a silicon oxide film 39 by CMP and then washing, the surface of each of the silicon oxide film 39 and Cu interconnections 46a to 46e is treated with a reducing plasma (ammonia plasma). Then, without vacuum break, a cap film (silicon nitride film) is formed continuously. This process makes it possible to improve the dielectric breakdown resistance (reliability) of a copper interconnection formed by the damascene method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.