Semiconductor integrated circuit device and a method of manufacturing the same
US6762444B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2002 |
| Grant date | Jul 13, 2004 |
| Priority date | — |
| Expiry date | Dec 3, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B10/12
Abstract
In order to improve the performance of a semiconductor integrated circuit device wherein a capacitor provided between storage nodes of an SRAM and a device having an analog capacitor are formed on a single substrate, a plug is formed in a silicon oxide film on a pair of n channel type MISFETs in a memory cell forming area, and a local wiring LIc for connecting respective gate electrodes and drains of the pair of n channel type MISFETs is formed over the silicon oxide film and the plug. Thereafter, a capacitive insulating film and an upper electrode are further formed over the local wiring LIc. According to the same process step as the local wiring, capacitive insulating film and upper electrode formed in the memory cell forming area, a local wiring LIc, a capacitive insulating film and an upper electrode are formed over a silicon oxide film in an analog capacitor forming area and a plug in the silicon oxide film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.