Structure and method of forming bitline contacts for a vertical DRAM array using a line bitline contact mask

US6767781B2 · kind B2 · utility

Assignees

• International Business Machines Corporation · US
• Infineon Technologies North America Corp. · US

Inventors

• Larry Nesbit · Farmington, US
• Jonathan E. Faltermeier · Delanson, US
• Ramachandra Divakaruni · Ossining, US
• Wolfgang Bergner · Waldbüttelbrunn, DE

Key dates

• Filing date: Sep 23, 2003
• Grant date: Jul 27, 2004
• Expiry date: Sep 23, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/485
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A bitline contact and method of forming bitline contact for a vertical DRAM array using a bitline contact mask. In the method, gate conductor lines are formed. An oxide layer is deposited over the gate conductor lines, and a bitline contact mask is formed over portions of the oxide layer. The bitline contact mask is etched, and a silicon layer is deposited on the substrate. A bitline layer is deposited on the silicon layer. A masking and etching operation is performed on the bitline layer. A M0 metal is deposited over the silicon layer and on sides of non etched portions of the bitline (M0) layer to form left and right bitlines.