Embedded ROM device using substrate leakage
US6781867B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2002 |
| Grant date | Aug 24, 2004 |
| Priority date | — |
| Expiry date | Jul 11, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/482
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A ROM embedded DRAM provides ROM cells that can be programmed to a single state. The ROM cells include capacitors having a storage node. The storage node is processed to have a substantially high substrate leakage. The ROM cells, therefore, are hard programmed to a logic zero state. Bias techniques can be used to read un-programmed ROM cells accurately. As described, sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. A differential pre-charge operation can also be used in another embodiment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.