Surface alteration of metal interconnect in integrated circuits for electromigration and adhesion improvement
US6794755B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2003 |
| Grant date | Sep 21, 2004 |
| Priority date | — |
| Expiry date | Apr 6, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Described is a method and apparatus for altering the top surface of a metal interconnect. In one embodiment of the invention, a metal interconnect and a barrier layer are formed into an interlayer dielectric (ILD) and the metal interconnect and the barrier layer are planarized to the top of the ILD. The top surfaces of the metal interconnect, the barrier layer, and the ILD are altered with a second metal to form an electromigration barrier. In one embodiment of the invention, the second metal is prevented from contaminating the electrical resistivity of the metal interconnect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.