Patent · US Expired

MRAM configuration having selection transistors with a large channel width

US6803618B2 · kind B2 · utility

2Cited by

5References

6Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Heinz Honigschmid · Starnberg, DE
Thomas Böhm · Zorneding, DE
Thomas Rohr · Aschheim, DE

Key dates

Filing date	May 13, 2003
Grant date	Oct 12, 2004
Priority date	—
Expiry date	May 13, 2023

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/16
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The invention relates to an MRAM configuration that includes a selection transistor connected to several MTJ memory cells. The selection transistor has an increased channel width.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.