Method of manufacturing a field effect transistor
US6806153B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 2003 |
| Grant date | Oct 19, 2004 |
| Priority date | — |
| Expiry date | Jun 17, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26513
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention allows the manufacturing of field effect transistors with reduced thermal budget. A first amorphized region and a second amorphized region are formed in a substrate adjacent to the gate electrode by implanting ions of a non-doping element, the presence of which does not significantly alter the conductive properties of the substrate. The formation of the amorphized regions may be performed before or after the formation of a source region, a drain region, an extended source region and an extended drain region. The substrate is annealed to achieve solid phase epitaxial regrowth of the amorphized regions and to activate dopants in the source region, the drain region, the extended source region and the extended drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.