Patent · US Expired

Material combinations for tunnel junction cap layer, tunnel junction hard mask and tunnel junction stack seed layer in MRAM processing

US6815248B2 · kind B2 · utility

15Cited by

17References

28Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Rainer Leuschner · Regensburg, DE
George Stojakovic · Poughkeepsie, US
Xian J. Ning · Potsdam, US

Key dates

Filing date	Apr 18, 2002
Grant date	Nov 9, 2004
Priority date	—
Expiry date	Apr 18, 2022

Classification

Technology area (CPC H)Electricity
CPC primaryH10N50/01
WIPO fieldMicro-structural and nano-technology
WIPO sectorChemistry

Abstract

A resistive memory device (110) and method of manufacturing thereof comprising a cap layer (140) and hard mask layer (142) disposed over magnetic stacks (114), wherein either the cap layer (140) or hard mask layer (142) comprise WN. A seed layer (136) disposed beneath the magnetic stacks (114) may also be comprised of WN, The use of the material WN improves etch process selectivity during the manufacturing process.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.