High-voltage semiconductor component

US6825514B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Gerald Deboy · Klagenfurt, AT
• Dirk Ahlers · Hersbruck, DE
• Helmut Strack · Hersbruck, DE
• Michael Rueb · Faak am See, AT
• Hans Weber · Villach, AT

Key dates

• Filing date: Jun 6, 2003
• Grant date: Nov 30, 2004
• Expiry date: Jun 6, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/519

Abstract

A process for manufacturing of a semiconductor device comprising a blocking pn junction, a source zone of a first conductivity type connected to a first electrode and bordering on a zone forming the blocking pn junction of a second conductivity type complementary to the first conductivity type, and a drain zone of the first conductivity type connected to a second electrode, the side of the zone of the second conductivity type facing the drain zone forming a first surface, and in the region between the first surface and a second surface located between the first surface and the drain zone, areas of the first and second conductivity type nested in one another, comprises the step of:varying in individual semiconductor layers, by doping, the degree of compensation in the regions of the second conductivity type.