Random access semiconductor memory with reduced signal overcoupling
US6826075B2 · kind B2 · utility
0Cited by
8References
17Claims
0Family size
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Key dates
| Filing date | Jul 13, 2001 |
| Grant date | Nov 30, 2004 |
| Priority date | — |
| Expiry date | Jul 13, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B61/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory matrix has at least one cell array including column lines and row lines. Memory elements are situated at points where the row lines and column lines intersect one another. In each case two adjacent lines are guided such that they cross one another in such a way that the two lines change their spatial configurations in sections along the direction in which they run. Thus an overcoupling of signals between the lines is minimized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.