Isolating trench and manufacturing process
US6828646B2 · kind B2 · utility
70Cited by
2References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 16, 2002 |
| Grant date | Dec 7, 2004 |
| Priority date | — |
| Expiry date | Oct 16, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/764
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An isolation trench formed in a semiconductor substrate has side walls and a bottom wall. Spacers are on the side walls and face each other for forming a narrow channel therebetween. The bottom wall and the spacers are coated with an electrically insulating material for delimiting a closed empty cavity in the channel. The isolation trench is applicable to the manufacture of integrated circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.