Structure and method for preventing process-induced UV radiation damage in a memory cell
US6833581B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2003 |
| Grant date | Dec 21, 2004 |
| Priority date | — |
| Expiry date | Jun 12, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to one exemplary embodiment, a structure comprises a substrate. The structure further comprises at least one memory cell situated on the substrate. The at least one memory cell may be, for example, a flash memory cell, such as a SONOS flash memory cell and may include a gate situated over an ONO stack. The structure further comprises an interlayer dielectric layer situated over the at least one memory cell and over the substrate. According to this exemplary embodiment, the structure further comprises a UV radiation blocking layer situated directly over the interlayer dielectric layer, where the UV radiation blocking layer is selected from the group consisting of silicon-rich oxide and silicon-rich nitride. The UV radiation blocking layer may have a thickness of between approximately 1500.0 Angstroms and approximately 2000.0 Angstroms, for example.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.