Method and apparatus for decomposing semiconductor device patterns into phase and chrome regions for chromeless phase lithography
US6851103B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2003 |
| Grant date | Feb 1, 2005 |
| Priority date | — |
| Expiry date | Jun 30, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70941
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of generating a mask of use in printing a target pattern on a substrate. The method includes the steps of (a) determining a maximum width of features to be imaged on the substrate utilizing phase-structures formed in the mask; (b) identifying all features contained in the target pattern having a width which is equal to or less than the maximum width; (c) extracting all features having a width which is equal to or less than the maximum width from the target pattern; (d) forming phase-structures in the mask corresponding to all features identified in step (b); and (e) forming opaque structures in the mask for all features remaining in target pattern after performing step (c).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.