Silicon wafer and silicon epitaxial wafer and production methods therefor
US6858094B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2001 |
| Grant date | Feb 22, 2005 |
| Priority date | — |
| Expiry date | Sep 27, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3225
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
The present invention provides a silicon wafer having a DZ layer near a surface and an oxide precipitate layer in a bulk portion, wherein interstitial oxygen concentrations of the DZ layer, the oxide precipitate layer and a transition region between the DZ layer and the oxide precipitate layer are all 8 ppma or less, and an epitaxial silicon wafer, wherein an epitaxial layer is formed on a surface of the silicon wafer, as well as a method for producing a silicon wafer, which comprises growing a silicon single crystal ingot having an initial interstitial oxygen concentration of 10 to 25 ppma by the Czochralski method, processing the silicon single crystal ingot into a wafer, and subjecting the wafer to a first heat treatment at 950 to 1050° C. for 2 to 5 hours, a second heat treatment at 450 to 550° C. for 4 to 10 hours, a third heat treatment at 750 to 850° C. for 2 to 8 hours, and a fourth heat treatment at 950 to 1100° C. for 8 to 24 hours. Thus, there is provided a method for producing a silicon wafer of which high resistivity can surely be maintained even when the wafer is subjected to a heat treatment for device production.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.