High voltage resistant edge structure for semiconductor components

US6870201B1 · kind B1 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Gerald Deboy · Klagenfurt, AT
• Jenoe Tihanyi · Tauberbischofsheim, DE
• Helmut Strack · Hersbruck, DE
• Helmut Gassel · Farmington Hills, US
• Jens-Peer Stengl · Hersbruck, DE
• Hans Weber · Villach, AT

Key dates

• Filing date: Nov 2, 1998
• Grant date: Mar 22, 2005
• Expiry date: Nov 2, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/256

Abstract

The invention relates to a high voltage resistant edge structure in the edge region of a semiconductor component which has floating guard rings of the first conductivity type and inter-ring zones of the second conductivity type which are arranged between the floating guard rings, wherein the conductivities and/or the inter-ring zones are set such that their charge carriers are totally depleted when blocking voltage is applied. The inventive edge structure achieves a modulation of the electrical field both at the surface and in the volume of the semiconductor body. If the inventive edge structure is suitably dimensioned, the field intensity maximum can easily be situated in the depth; that is, in the region of the vertical p-n junction. Thus, a suitable edge construction which permits a “soft” leakage of the electrical field in the volume can always be provided over a wide range of concentrations of p and n doping.