Method for error reduction in lithography
US6883158B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 2000 |
| Grant date | Apr 19, 2005 |
| Priority date | — |
| Expiry date | May 22, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70783
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present invention relates to a method and a system for predicting and correcting geometrical errors in lithography using masks, such as large-area photomasks or reticles, and exposure stations, such as wafer steppers or projection aligners, printing the pattern of said masks on a workpiece, such as a display panel or a semi-conductor wafer. The method according to the invention comprises the steps of collecting information about a mask substrate, a mask writer, an exposure stati n, and/or about behavior of a processing step that will occur after the writing of the mask. Further the method comprises predicting from the combined information distorsions occuring in the pattern, when it is subsequently printed on the workpiece; calculating from said prediction a correction to diminish said predicted distorsion, and exposing said pattern onto said mask substrate while applying said correction for said distorsions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.