Method for producing a MOS transistor and MOS transistor

US6884688B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Kai Esmark · Schwanau, DE
• Harald Gossner · Riemerling, DE
• Gunther Mackh · Dresden, DE
• Richard Owen · Fremont, US
• Franz Zangl · Birkenfeld, DE

Key dates

• Filing date: Oct 2, 2002
• Grant date: Apr 26, 2005
• Expiry date: Oct 2, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D89/811

Abstract

A MOS transistor includes a drain zone, a source zone, and a gate electrode. Doping atoms of the first conductivity type are implanted in the region of the drain zone and the source zone by at least two further implantation steps such that a pn junction between the drain zone and a substrate region is vertically shifted and a voltage ratio of the MOS transistor between a lateral breakdown voltage and a vertical breakdown voltage can be set.