Method for making an integrated circuit package having reduced bow
US6887740B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 2003 |
| Grant date | May 3, 2005 |
| Priority date | — |
| Expiry date | Apr 10, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19041
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device includes a semiconductor component coupled with a lead frame, and an integrated circuit package encompassing at least a portion of the semiconductor component. The package has a first surface and a second surface, and side surfaces, where the first surface is opposite the second surface. A parting line of the integrated circuit package is offset toward the second surface of the package, where the first surface optionally comprises the bottom surface of the package. The first surface of the package has one or more recessed areas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.