Transistor configuration with a structure for making electrical contact with electrodes of a trench transistor cell

US6891223B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Joachim Krumrey · Eisenlohrsweg, AT
• Franz Hirler · Isen, DE
• Ralf Henninger · Birkenfeld, DE
• Martin Pölzl · Ossiach, AT
• Walter Rieger · Arnoldstein, AT

Key dates

• Filing date: Mar 19, 2003
• Grant date: May 10, 2005
• Expiry date: Sep 5, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/519

Abstract

Transistor configurations have trench transistor cells disposed along trenches in a semiconductor substrate with two or more electrode structures disposed in the trenches, and also metallizations are disposed above a substrate surface of the semiconductor substrate. The trenches extend into an inactive edge region of the transistor configuration and an electrically conductive connection between the electrode structures and corresponding metallizations are provided in the edge region.