Method for test conditions
US6895346B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2002 |
| Grant date | May 17, 2005 |
| Priority date | — |
| Expiry date | Jun 7, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2818
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A manufacturing method of an electronic device is to improve test efficiency using test structure and improve yield. The manufacturing method performs test using a first lead wire disposed on an insulating layer formed on a substrate and a second lead wire electrically connected to the substrate and disposed on the insulating layer and manages the electronic device on the basis of results of the test to manufacture the electronic device. The manufacturing method includes a step of testing whether the first lead wire is disconnected or not by measuring an electric resistance between both ends of the first lead wire and a step of testing whether the first and second lead wires are short-circuited or not by measuring an electric resistance between the first lead wire and the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.