Configuration for generating a voltage sense signal in a power semiconductor component

US6914297B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Gerald Deboy · Klagenfurt, AT
• Armin Willmeroth · Friedberg, DE

Key dates

• Filing date: Jul 29, 2003
• Grant date: Jul 5, 2005
• Expiry date: Dec 19, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D89/60

Abstract

The invention relates to a configuration for generating a low-voltage signal proportional to the high voltage present between the source and the drain of a power transistor. For this purpose, a capacitive voltage divider including the source-gate capacitance serving as a low-voltage tap and the source-drain capacitance serving as a high-voltage element is situated in a voltage sense region.