Replacement gate strained silicon finFET process
US6936516B1 · kind B1 · utility
23Cited by
12References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 12, 2004 |
| Grant date | Aug 30, 2005 |
| Priority date | — |
| Expiry date | Mar 20, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/751
Abstract
An exemplary embodiment relates to a method of FinFET formation. The method can include providing a sacrificial fin structure, removing the sacrificial fin structure, and providing a strained silicon layer at the location of the removed sacrificial gate structure. The FinFET can include a strained-Si MOSFET channel region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.