Programming of a flash memory cell
US6937518B1 · kind B1 · utility
18Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2003 |
| Grant date | Aug 30, 2005 |
| Priority date | — |
| Expiry date | Jul 10, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3468
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of programming a memory device comprises applying a first programming voltage to one of a plurality of wordlines, corresponding to a cell to be programmed. The first programming voltage is substantially equal to the desired threshold voltage. A second programming voltage is also applied to one of a plurality of bitlines, corresponding to the cell to be programmed. The second programming voltage gradually increases from a low level toward a high level. The first programming voltage and second programming voltage are removed when the corresponding bitline current begins to decrease.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.