Patent · US Expired

Integrated dynamic memory having a control circuit for controlling a refresh mode for memory cells

US6940775B2 · kind B2 · utility

5Cited by

4References

9Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Ralf Schneider · Birkenfeld, DE
Manfred Proll · Dorfen, DE
Georg Eggers · Birkenfeld, DE
Jorg Kliewer · Birkenfeld, DE

Key dates

Filing date	Apr 14, 2004
Grant date	Sep 6, 2005
Priority date	—
Expiry date	Apr 14, 2024

Classification

Technology area (CPC G)Physics
CPC primaryG11C2211/4061
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated dynamic memory includes memory cells which are combined to form individual independently addressable units, and a control circuit for controlling a refresh mode for the memory cells. The memory cells can have their memory cell content refreshed. The control circuit is designed such that one or more units of memory cells can be subject to a refresh mode in parallel in a refresh cycle. The control circuit sets a number of memory cell units, which are to be refreshed in parallel in a refresh cycle based on a temperature reference value. A maximum possible operating temperature for a memory chip can be increased without additional restrictions on memory access.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.