Patent · US Expired

Void formation monitoring in a damascene process

US6964874B2 · kind B2 · utility

23Cited by

7References

43Claims

0Family size

Assignee

Advanced Micro Devices, Inc. · US

Inventors

Thomas Werner · Radebeul, DE
Peter Hübler · Coswig, DE
Frank Koschinsky · Radebeul, DE

Key dates

Filing date	Sep 27, 2002
Grant date	Nov 15, 2005
Priority date	—
Expiry date	Sep 27, 2022

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/0002
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

The invention provides a technique of monitoring the void formation in a damascene interconnection process. According to the invention, a test structure is provided that includes at least two damascene structures that have at least one different cross-sectional geometric parameter. To monitor the void formation, the test structure is cut to expose a cross-sectional view to the damascene structures. The cross-sectional view is then inspected and the void formation is investigated in each of the damascene structures. The invention is particularly applicable to multi-level copper-based dual-damascene interconnection processes to monitor the voiding at the interface between barrier layers and bottom metal trenches. The invention allows monitoring of the void formation by locating only one structure on the chip and performing only one cut.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.