Method of activating polysilicon gate structure dopants after offset spacer deposition

US6969646B2 · kind B2 · utility

Assignee

• Chartered Semiconductor Manufacturing LTD · SG

Inventors

• Elgin Quek · Singapore, SG
• Francis Benistant · Singapore, SG

Key dates

• Filing date: Feb 10, 2003
• Grant date: Nov 29, 2005
• Expiry date: Feb 10, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/021

Abstract

A process sequence used to integrate an anneal cycle, used to activate ion implanted dopants in a polysilicon gate structure, and the definition of offset silicon oxide spacers on the sides of the polysilicon gate structure, has been developed. The process sequence features ion implantation of dopants into a blanket polysilicon layer located overlying a metal oxide semiconductor field effect transistor (MOSFET), gate insulator layer. After definition of the polysilicon gate structure a silicon oxide layer is deposited, followed by an anneal procedure allowing activation of the implanted dopants in the polysilicon gate structure to occur. Out diffusion of implanted dopants during the activation anneal procedure is minimized as a result of the overlying silicon oxide layer. An anisotropic dry etching procedure is then performed on the silicon oxide layer resulting in the definition of offset silicon oxide spacers on the sides of the polysilicon gate structure.